FPGA-based 0.5 ns signal sampler with Digilent Arty A7-35 using Fakernet

Sampling

The input signals are sampled using iserdese2 units in oversample mode with 4 evenly spaced samples every clock cycle at 500 MHz, giving an effective sampling speed of 2 GHz, i.e. 0.5 ns intervals.

Data is streamed out via the Fakernet TCP interface. Each cycle of the 125 MHz general logic clock with a signal change (0/1) is reported with the channel number, a 32-bit timestamp and a 2+16 bit pattern of the 2 GHz samples (2 bits for the previous clock cycle). (Note: currently at most every second 125 MHz cycle can report data.)

This method can be used to replace TAC and ADC digitization of time intervals down to 0.5 ns (σ ≈ 0.3 ns).

Testing

Load the Fakernet gateware in the usual way.

Board #1 flips the polarity of output signal 1 every 2^24 clock cycles, i.e. generating a signal with period 0.268 s. Board #2 report the timestamp with 0.5 ns sub-cycle precision.

The accuracy is given by the on-board oscillator stability. An idea of the accuracy is given by the left plot, showing the relative frequencies of the oscillators of the two boards. The right plot shows the difference between adjacent interval counts.

After each transition of signal 1 (start), signal 2 (stop) is flipped (128 + n * 256) ns later; n is in the interval [0,7].

The interval between the start and stop signals define a time interval, extracted from the timestamps reported by board #2. The green histogram shows the resulting comb-like structure. The insets show that each time difference is typically associated with only 2 or 3 adjacent values.

The outputs are currently on pins jd1 and jd3. The inputs at jd0 and jd2. To read the sampler data:

client/fnetctrl 192.168.1.192 --tcp=func
Sampler-1: 0213fc00 68000007 0680000076 (- 660000076 = 536870912 ; - 660000076 = 536870912)
Sampler-2: 0223f800 68000017 0680000175 (- 660000d74 = 536867841 ; - 680000076 = 255)
Sampler-1: 02100003 69000006 069000006e (- 67000006e = 536870912 ; - 67000006e = 536870912)
Sampler-2: 02200007 69000036 069000036d (- 670000f6d = 536867840 ; - 69000006e = 767)
Sampler-1: 0213fc00 6a000007 06a0000076 (- 680000076 = 536870912 ; - 680000076 = 536870912)
Sampler-2: 0223f800 6a000057 06a0000575 (- 680000175 = 536871936 ; - 6a0000076 = 1279)
Sampler-1: 02100007 6b000006 06b000006d (- 69000006e = 536870911 ; - 69000006e = 536870911)
Sampler-2: 02200007 6b000076 06b000076d (- 69000036d = 536871936 ; - 6b000006d = 1792)
Sampler-1: 0213fc00 6c000007 06c0000076 (- 6a0000076 = 536870912 ; - 6a0000076 = 536870912)
Sampler-2: 0223f800 6c000097 06c0000975 (- 6a0000575 = 536871936 ; - 6c0000076 = 2303)
Sampler-1: 02100007 6d000006 06d000006d (- 6b000006d = 536870912 ; - 6b000006d = 536870912)
Sampler-2: 02200007 6d0000b6 06d0000b6d (- 6b000076d = 536871936 ; - 6d000006d = 2816)
Sampler-1: 0213fc00 6e000007 06e0000076 (- 6c0000076 = 536870912 ; - 6c0000076 = 536870912)
Sampler-2: 0223f000 6e0000d7 06e0000d74 (- 6c0000975 = 536871935 ; - 6e0000076 = 3326)
Sampler-1: 02100007 6f000006 06f000006d (- 6d000006d = 536870912 ; - 6d000006d = 536870912)
Sampler-2: 02200007 6f0000f6 06f0000f6d (- 6d0000b6d = 536871936 ; - 6f000006d = 3840)
Sampler-1: 0213fc00 70000007 0700000076 (- 6e0000076 = 536870912 ; - 6e0000076 = 536870912)
Sampler-2: 0223f000 70000017 0700000174 (- 6e0000d74 = 536867840 ; - 700000076 = 254)

• The first data word contains the channel number and the 16+2 pattern of the 2 GHz samples.
• The second data word contains the 32-bit cycle count.
• The third printed word is the reconstructed time of the transition, effectively the timestamp shifted up by 4 bits, and the 4 low bits calcalated from the sample pattern.
• The values in parenthesis show two time differences: to the previous edge of the same kind in the same channel, and to the previous edge of the same kind in the first channel.

Last modified: Mon Dec 19 09:35:58 CET 2022