TRLO II - trlo_defs.h (ver/vulom4_trlo)

/* This file is automatically generated by */
/*                                         */
/* scripts/make_vme_def.pl                 */
/*                                         */
/* Editing is useless!                     */

#define TRLO_MD5SUM_FULL   "2dc43f8d969bc0420874a4996ea4dfb1"
#define TRLO_MD5SUM_STAMP                         0x6ea4dfb1

/* Constants for 'nonlatched_mode': */

#define TRLO_NONLATCHED_MODE_LOGIC                     0x0
#define TRLO_NONLATCHED_MODE_NONLATCHED                0x1
#define TRLO_NONLATCHED_MODE_LOGIC_OR_NONLATCHED       0x2
#define TRLO_NONLATCHED_MODE_LOGIC_AND_NONLATCHED      0x3
#define TRLO_NONLATCHED_MODE_MASK                      0x3

#define TRLO_NONLATCHED_IN_MUX                         0x0
#define TRLO_NONLATCHED_IN_OR(i)                      (0x4 + (i) * 4)
#define TRLO_NONLATCHED_IN_MASK                        0xc

/* Constants for 'scaler_mode': */

#define TRLO_SCALER_MODE_LEADING_EDGE                  0x0
#define TRLO_SCALER_MODE_TRAILING_EDGE                 0x1
#define TRLO_SCALER_MODE_DURATION_CLK                  0x2
#define TRLO_SCALER_MODE_DURATION_TICK                 0x3
#define TRLO_SCALER_MODE_MASK                          0x3

#define TRLO_SCALER_LATCH_LEADING_EDGE                 0x0
#define TRLO_SCALER_LATCH_TRAILING_EDGE                0x4
#define TRLO_SCALER_LATCH_MASK                         0x4

/* Constants for 'timer_latch_mode': */

#define TRLO_TIMER_LATCH_MODE_LEADING_EDGE             0x0
#define TRLO_TIMER_LATCH_MODE_TRAILING_EDGE            0x1
#define TRLO_TIMER_LATCH_MODE_MASK                     0x1

/* Constants for 'restart_mode': */

#define TRLO_RESTART_MODE_LEADING_EDGE                 0x0
#define TRLO_RESTART_MODE_TRAILING_EDGE                0x1
#define TRLO_RESTART_MODE_LEAD_IF_INACT                0x2
#define TRLO_RESTART_MODE_WHEN_PRESENT                 0x3
#define TRLO_RESTART_MODE_MASK                         0x3

/* Constants for 'lmu_restart_mode': */

#define TRLO_LMU_RESTART_MODE_LEADING_EDGE             0x0
#define TRLO_LMU_RESTART_MODE_TRAILING_EDGE            0x1
#define TRLO_LMU_RESTART_MODE_LEAD_IF_INACT            0x2
#define TRLO_LMU_RESTART_MODE_WHEN_PRESENT             0x3
#define TRLO_LMU_RESTART_MODE_MASK                     0x3

#define TRLO_LMU_RESTART_GATE_DISABLE                  0x0
#define TRLO_LMU_RESTART_GATE_ENABLE                   0x4
#define TRLO_LMU_RESTART_GATE_MASK                     0x4

/* Constants for 'input_coinc_restart_mode': */

#define TRLO_INPUT_COINC_RESTART_MODE_LEADING_EDGE     0x0
#define TRLO_INPUT_COINC_RESTART_MODE_TRAILING_EDGE    0x1
#define TRLO_INPUT_COINC_RESTART_MODE_LEAD_IF_INACT    0x2
#define TRLO_INPUT_COINC_RESTART_MODE_WHEN_PRESENT     0x3
#define TRLO_INPUT_COINC_RESTART_MODE_MASK             0x3

#define TRLO_INPUT_COINC_RESTART_GATE_DISABLE          0x0
#define TRLO_INPUT_COINC_RESTART_GATE_ENABLE           0x4
#define TRLO_INPUT_COINC_RESTART_GATE_MASK             0x4

/* Constants for 'trig_delay_mode': */

#define TRLO_TRIG_DELAY_MODE_DELAY_ZERO                0x0
#define TRLO_TRIG_DELAY_MODE_DELAY_ONE                 0x4
#define TRLO_TRIG_DELAY_MODE_DELAY_TWO                 0x5
#define TRLO_TRIG_DELAY_MODE_DELAY_LINE                0x6
#define TRLO_TRIG_DELAY_MODE_TEST_INPUT                0x7
#define TRLO_TRIG_DELAY_MODE_MASK                      0x7

#define TRLO_TRIG_RESTART_MODE_LEADING_EDGE            0x0
#define TRLO_TRIG_RESTART_MODE_WHEN_PRESENT            0x8
#define TRLO_TRIG_RESTART_MODE_MASK                    0x8

#define TRLO_TRIG_INPUT_MODE_THIS                      0x0
#define TRLO_TRIG_INPUT_MODE_PREV                      0x10
#define TRLO_TRIG_INPUT_MODE_MASK                      0x10

/* Constants for 'trig_control': */

#define TRLO_TRIG_CONTROL_ACCEPT_SETS_INTERNAL_DT      0x00000001
#define TRLO_TRIG_CONTROL_ACCEPT_SETS_INTERNAL_BUSY    0x00000002
#define TRLO_TRIG_CONTROL_ACCEPT_RESETS_TRIG_SCALER    0x00000004

/* Constants for 'multi_latch_control': */

#define TRLO_MULTI_LATCH_CONTROL_ALM_FULL_LEVEL_SHIFT  0
#define TRLO_MULTI_LATCH_CONTROL_ALM_FULL_LEVEL_MASK   0x000003ff
#define TRLO_MULTI_LATCH_CONTROL_TWO_WORDS             0x00000400

/* Constants for 'multi_trig_buf_control': */

#define TRLO_MULTI_TRIG_BUF_CONTROL_ALM_FULL_LEVEL_SHIFT  0
#define TRLO_MULTI_TRIG_BUF_CONTROL_ALM_FULL_LEVEL_MASK  0x000003ff

/* Constants for 'pulse': */

#define TRLO_PULSE_TRIG_SCALER_RESET                   0x00000001
#define TRLO_PULSE_TRIG_SCALER_LATCH                   0x00000002
#define TRLO_PULSE_SCALER_RESET                        0x00000004
#define TRLO_PULSE_SCALER_LATCH                        0x00000008
#define TRLO_PULSE_MUX_SRC_SCALER_RESET                0x00000010
#define TRLO_PULSE_MUX_SRC_SCALER_LATCH                0x00000020
#define TRLO_PULSE_TIMER_RESET                         0x00000040
#define TRLO_PULSE_TIMER_LATCH                         0x00000080
#define TRLO_PULSE_MASTER_START                        0x00000100
#define TRLO_PULSE_PTN_LATCH(i)                       (0x00000200 << (i))
#define TRLO_PULSE_PTN_LATCH_ALL                       0x00000600
#define TRLO_PULSE_EDGE_GATE_START(i)                 (0x00000800 << (i))
#define TRLO_PULSE_EDGE_GATE_START_ALL                 0x00001800
#define TRLO_PULSE_EDGE_GATE_STOP(i)                  (0x00002000 << (i))
#define TRLO_PULSE_EDGE_GATE_STOP_ALL                  0x00006000
#define TRLO_PULSE_TRACER_START                        0x00008000
#define TRLO_PULSE_TRACER_CLEAR                        0x00010000
#define TRLO_PULSE_MULTI_LATCH_CLEAR(i)               (0x00020000 << (i))
#define TRLO_PULSE_MULTI_LATCH_CLEAR_ALL               0x001e0000
#define TRLO_PULSE_MULTI_TRIG_BUF_CLEAR                0x00200000
#define TRLO_PULSE_MUX_SRCS                            0x00400000
#define TRLO_PULSE_MUX_DESTS                           0x00800000
#define TRLO_PULSE_SET_INT_DT                          0x01000000
#define TRLO_PULSE_CLEAR_INT_DT                        0x02000000
#define TRLO_PULSE_SET_INT_BUSY                        0x04000000
#define TRLO_PULSE_CLEAR_INT_BUSY                      0x08000000
#define TRLO_PULSE_SERIAL_TSTAMP_BUF_CLEAR             0x10000000
#define TRLO_PULSE_SERIAL_TSTAMP_FAIL_CLEAR            0x20000000

/* Constants for 'slew_counter': */

#define TRLO_SLEW_COUNTER_ADD_OFFSET_LO                0x00000001
#define TRLO_SLEW_COUNTER_ADD_OFFSET_HI                0x00000002

/* Constants for 'trig_status': */

#define TRLO_TRIG_STATUS_DT_IN                         0x00000001
#define TRLO_TRIG_STATUS_BUSY_IN                       0x00000002
#define TRLO_TRIG_STATUS_INTERNAL_DT                   0x00000004
#define TRLO_TRIG_STATUS_INTERNAL_BUSY                 0x00000008
#define TRLO_TRIG_STATUS_DT                            0x00000010
#define TRLO_TRIG_STATUS_BUSY                          0x00000020
#define TRLO_TRIG_STATUS_AFTER_LMU_ENABLED_OR          0x00000040
#define TRLO_TRIG_STATUS_LMU_STUCK_OR                  0x00000080
#define TRLO_TRIG_STATUS_LMU_ENABLED_STUCK_OR          0x00000100
#define TRLO_TRIG_STATUS_INHIBIT                       0x00000200
#define TRLO_TRIG_STATUS_STATE_SHIFT                   10
#define TRLO_TRIG_STATUS_STATE_MASK                    0x00007c00
#define TRLO_TRIG_STATUS_REASON_SHIFT                  15
#define TRLO_TRIG_STATUS_REASON_MASK                   0x00078000

/* Constants for 'trig_status/TRLO_TRIG_STATUS_STATE': */

#define TRLO_TRIG_STATUS_STATE_IDLE                    1
#define TRLO_TRIG_STATUS_STATE_START_WINDOW            2
#define TRLO_TRIG_STATUS_STATE_WINDOW                  3
#define TRLO_TRIG_STATUS_STATE_END_WINDOW              4
#define TRLO_TRIG_STATUS_STATE_TRIG_SELECT             5
#define TRLO_TRIG_STATUS_STATE_PRIO_ENCODE             6
#define TRLO_TRIG_STATUS_STATE_START_SEND_TRIG         7
#define TRLO_TRIG_STATUS_STATE_SEND_TRIG               8
#define TRLO_TRIG_STATUS_STATE_BUSY_START              9
#define TRLO_TRIG_STATUS_STATE_BUSY                    10
#define TRLO_TRIG_STATUS_STATE_WAIT_TRIVA              11
#define TRLO_TRIG_STATUS_STATE_TRIVA_DONE              12
#define TRLO_TRIG_STATUS_STATE_PENDING_PULSE_TRIG      13
#define TRLO_TRIG_STATUS_STATE_PULSE_SELECT            14
#define TRLO_TRIG_STATUS_STATE_SUDDEN_DT               15
#define TRLO_TRIG_STATUS_STATE_SUDDEN_BUSY             16

/* Constants for 'trig_status/TRLO_TRIG_STATUS_REASON': */

#define TRLO_TRIG_STATUS_REASON_IDLE                   0
#define TRLO_TRIG_STATUS_REASON_TRIGGER                1
#define TRLO_TRIG_STATUS_REASON_PENDING_TRIG           2
#define TRLO_TRIG_STATUS_REASON_PULSE_TRIG             3
#define TRLO_TRIG_STATUS_REASON_DT_ON_IDLE             4
#define TRLO_TRIG_STATUS_REASON_BUSY_ON_IDLE           5
#define TRLO_TRIG_STATUS_REASON_DT_ON_BUSY             6
#define TRLO_TRIG_STATUS_REASON_PEND_IN_BUSY           7
#define TRLO_TRIG_STATUS_REASON_TRIG_ON_PEND           8
#define TRLO_TRIG_STATUS_REASON_TRIG_ON_SUD_DT         9
#define TRLO_TRIG_STATUS_REASON_TRIG_ON_SUD_BUSY       10

/* Constants for 'tracer_status': */

#define TRLO_TRACER_STATUS_DATA_AVAIL_SHIFT            0
#define TRLO_TRACER_STATUS_DATA_AVAIL_MASK             0x000003ff
#define TRLO_TRACER_STATUS_ACTIVE                      0x00000400
#define TRLO_TRACER_STATUS_COMPACTING                  0x00000800

/* Constants for 'multi_latch_status': */

#define TRLO_MULTI_LATCH_STATUS_DATA_AVAIL_SHIFT       0
#define TRLO_MULTI_LATCH_STATUS_DATA_AVAIL_MASK        0x000003ff
#define TRLO_MULTI_LATCH_STATUS_LOST_WRITE             0x00000400

/* Constants for 'multi_trig_buf_status': */

#define TRLO_MULTI_TRIG_BUF_STATUS_DATA_AVAIL_SHIFT    0
#define TRLO_MULTI_TRIG_BUF_STATUS_DATA_AVAIL_MASK     0x000003ff
#define TRLO_MULTI_TRIG_BUF_STATUS_CHECKSUM_SHIFT      10
#define TRLO_MULTI_TRIG_BUF_STATUS_CHECKSUM_MASK       0x03fffc00

/* Constants for 'period': */

#define TRLO_PERIOD_MASK                               0xffffffff
#define TRLO_PERIOD_VALADD                             2

/* Constants for 'prng_period': */


/* Constants for 'prng_poisson': */

#define TRLO_PRNG_POISSON_MASK                         0xffffffff

/* Constants for 'timer_tick_period': */

#define TRLO_TIMER_TICK_PERIOD_MASK                    0x0000ffff

/* Constants for 'lmu_andnand': */

#define TRLO_LMU_ANDNAND_MASK                          0x000000ff

/* Constants for 'lmu_not': */

#define TRLO_LMU_NOT_MASK                              0x000000ff

/* Constants for 'lmu_delay': */

#define TRLO_LMU_DELAY_MASK                            0x000003ff

/* Constants for 'lmu_stretch': */

#define TRLO_LMU_STRETCH_MASK                          0x000003ff

/* Constants for 'input_coinc_delay': */

#define TRLO_INPUT_COINC_DELAY_MASK                    0x000003ff

/* Constants for 'input_coinc_stretch': */

#define TRLO_INPUT_COINC_STRETCH_MASK                  0x000003ff

/* Constants for 'delay': */

#define TRLO_DELAY_MASK                                0x00003fff

/* Constants for 'stretch': */

#define TRLO_STRETCH_MASK                              0xffffffff

/* Constants for 'downscale': */

#define TRLO_DOWNSCALE_MASK                            0x0000ffff

/* Constants for 'trig_lmu_andnand': */

#define TRLO_TRIG_LMU_ANDNAND_MASK                     0x0000ffff

/* Constants for 'trig_lmu_mux_andnand': */

#define TRLO_TRIG_LMU_MUX_ANDNAND_MASK                 0x00000001

/* Constants for 'trig_lmu_aux_andnand': */

#define TRLO_TRIG_LMU_AUX_ANDNAND_MASK                 0x0000000f

/* Constants for 'trig_lmu_not': */

#define TRLO_TRIG_LMU_NOT_MASK                         0x0000ffff

/* Constants for 'trig_delay': */

#define TRLO_TRIG_DELAY_MASK                           0x000003ff

/* Constants for 'trig_stretch': */

#define TRLO_TRIG_STRETCH_MASK                         0x000000ff

/* Constants for 'trig_red': */

#define TRLO_TRIG_RED_MASK                             0x0000000f

/* Constants for 'max_multi_trig': */

#define TRLO_MAX_MULTI_TRIG_MASK                       0x00003fff

/* Constants for 'accept_window_len': */

#define TRLO_ACCEPT_WINDOW_LEN_MASK                    0x000000ff

/* Constants for 'fast_busy_len': */

#define TRLO_FAST_BUSY_LEN_MASK                        0x000000ff

/* Constants for 'sum_out_stretch': */

#define TRLO_SUM_OUT_STRETCH_MASK                      0x000000ff

/* VME register map: */

typedef struct trlo_fixed_map_t
{
  /*    0 0x4000 */ uint32_t version_md5sum;                 
  /*    1 0x4004 */ uint32_t compile_time;                   
  /*    2 0x4008 */

} trlo_fixed_map;

typedef struct trlo_output_map_t
{
  /*    0 0x5000 */ uint32_t trig_tpat_cnt;                  
  /*    1 0x5004 */ uint32_t trig_count;                     
  /*    2 0x5008 */ uint32_t trig_checksum;                  
  /*    3 0x500c */ uint32_t trig_status;                    /* Consts */
  /*    4 0x5010 */ uint32_t pending;                        
  /*    5 0x5014 */ uint32_t lmu_stuck_in;                   
  /*    6 0x5018 */ uint32_t lmu_stuck_out;                  
  /*    7 0x501c */ uint32_t lmu_enabled_stuck_out;          
  /*    8 0x5020 */ uint32_t edge_gate;                      
  /*    9 0x5024 */ uint32_t pend_restart_wait;              
  /*   10 0x5028 */ uint32_t tracer_status;                  /* Consts */
  /*   11 0x502c */ uint32_t multi_latch_status[4];          /* Consts */
  /*   15 0x503c */ uint32_t multi_trig_buf_status;          /* Consts */
  /*   16 0x5040 */ uint32_t slew_counter_cur_hi;            
  /*   17 0x5044 */ uint32_t slew_counter_cur_lo;            
  /*   18 0x5048 */ uint32_t serial_timestamp_status;        
  /*   19 0x504c */ uint32_t serial_timestamp_aux_status;    
  /*   20 0x5050 */ uint32_t debug_counter[1];               
  /*   21 0x5054 */ uint32_t debug_register[1];              
  /*   22 0x5058 */

} trlo_output_map;

typedef struct trlo_scaler_map_t
{
  /*    0 0x6000 */ uint32_t gen[8];                         
  /*    8 0x6020 */ uint32_t before_lmu[16];                 
  /*   24 0x6060 */ uint32_t before_lmu_mux[1];              
  /*   25 0x6064 */ uint32_t before_lmu_aux[4];              
  /*   29 0x6074 */ uint32_t before_deadtime[16];            
  /*   45 0x60b4 */ uint32_t after_deadtime[16];             
  /*   61 0x60f4 */ uint32_t after_reduction[16];            
  /*   77 0x6134 */ uint32_t mux_src[97];                    
  /*  174 0x62b8 */

} trlo_scaler_map;

typedef struct trlo_ptnlt_map_t
{
  /*    0 0x7000 */ uint32_t pattern_latch[2][4];            
  /*    8 0x7020 */

} trlo_ptnlt_map;

typedef struct trlo_tlatch_map_t
{
  /*    0 0x8000 */ uint32_t timing_tick[2];                 
  /*    2 0x8008 */ uint32_t deadtime_tick[2];               
  /*    4 0x8010 */ uint32_t last_dt_release[2];             
  /*    6 0x8018 */ uint32_t trig_time[2];                   
  /*    8 0x8020 */ uint32_t timer_latch[4][2];              
  /*   16 0x8040 */

} trlo_tlatch_map;

typedef struct trlo_setup_map_t
{
  /*    0 0x9000 */ uint32_t mux[104];                       
  /*  104 0x91a0 */ uint32_t nonlatched_mux[26];             
  /*  130 0x9208 */ uint32_t nonlatched_mode[26];            /* Consts */
  /*  156 0x9270 */ uint32_t nonlatched_or[3][1];            
  /*  159 0x927c */ uint32_t direct_mask[5][6];              
  /*  189 0x92f4 */ uint32_t scaler_mode[8];                 /* Consts */
  /*  197 0x9314 */ uint32_t timer_latch_mode[4];            /* Consts */
  /*  201 0x9324 */ uint32_t multi_latch_control[4];         /* Consts */
  /*  205 0x9334 */ uint32_t all_or_mask[2][4];              
  /*  213 0x9354 */ uint32_t period[7];                      /* Consts */
  /*  220 0x9370 */ uint32_t restart_at;                     
  /*  221 0x9374 */ uint32_t prng_poisson[1];                /* Consts */
  /*  222 0x9378 */ uint32_t lmu_and[8];                     /* Consts */
  /*  230 0x9398 */ uint32_t lmu_nand[8];                    /* Consts */
  /*  238 0x93b8 */ uint32_t lmu_not;                        /* Consts */
  /*  239 0x93bc */ uint32_t lmu_delay[8];                   /* Consts */
  /*  247 0x93dc */ uint32_t lmu_stretch[8];                 /* Consts */
  /*  255 0x93fc */ uint32_t lmu_restart_mode[8];            /* Consts */
  /*  263 0x941c */ uint32_t coinc_mask[1];                  
  /*  264 0x9420 */ uint32_t coinc_level[1];                 
  /*  265 0x9424 */ uint32_t input_coinc_mask[1][1];         
  /*  266 0x9428 */ uint32_t input_coinc_level[1];           
  /*  267 0x942c */ uint32_t input_coinc_delay[1];           /* Consts */
  /*  268 0x9430 */ uint32_t input_coinc_stretch[1];         /* Consts */
  /*  269 0x9434 */ uint32_t input_coinc_restart_mode[1];    /* Consts */
  /*  270 0x9438 */ uint32_t downscale[2];                   /* Consts */
  /*  272 0x9440 */ uint32_t delay[4];                       /* Consts */
  /*  276 0x9450 */ uint32_t stretch[4];                     /* Consts */
  /*  280 0x9460 */ uint32_t restart_mode[4];                /* Consts */
  /*  284 0x9470 */ uint32_t slew_counter_add;               
  /*  285 0x9474 */ uint32_t slew_counter_offset;            
  /*  286 0x9478 */ uint32_t serial_timestamp_speed;         
  /*  287 0x947c */ uint32_t serial_timestamp_aux_bits;      
  /*  288 0x9480 */ uint32_t serial_timestamp_buf_control;   
  /*  289 0x9484 */ uint32_t trig_delay[16];                 /* Consts */
  /*  305 0x94c4 */ uint32_t trig_delay_mode[16];            /* Consts */
  /*  321 0x9504 */ uint32_t trig_stretch[16];               /* Consts */
  /*  337 0x9544 */ uint32_t trig_mux[1];                    
  /*  338 0x9548 */ uint32_t trig_mux_delay[1];              
  /*  339 0x954c */ uint32_t trig_mux_delay_mode[1];         
  /*  340 0x9550 */ uint32_t trig_mux_stretch[1];            
  /*  341 0x9554 */ uint32_t trig_lmu_and[16];               /* Consts */
  /*  357 0x9594 */ uint32_t trig_lmu_nand[16];              /* Consts */
  /*  373 0x95d4 */ uint32_t trig_lmu_mux_and[16];           /* Consts */
  /*  389 0x9614 */ uint32_t trig_lmu_mux_nand[16];          /* Consts */
  /*  405 0x9654 */ uint32_t trig_lmu_aux_and[16];           /* Consts */
  /*  421 0x9694 */ uint32_t trig_lmu_aux_nand[16];          /* Consts */
  /*  437 0x96d4 */ uint32_t trig_lmu_not;                   /* Consts */
  /*  438 0x96d8 */ uint32_t trig_red[16];                   /* Consts */
  /*  454 0x9718 */ uint32_t tpat_enable;                    
  /*  455 0x971c */ uint32_t tpat_trig[16];                  
  /*  471 0x975c */ uint32_t max_multi_trig;                 /* Consts */
  /*  472 0x9760 */ uint32_t multi_trigger;                  
  /*  473 0x9764 */ uint32_t accept_window_len;              /* Consts */
  /*  474 0x9768 */ uint32_t fast_busy_len;                  /* Consts */
  /*  475 0x976c */ uint32_t sum_out_stretch;                /* Consts */
  /*  476 0x9770 */ uint32_t sum_out_mask;                   
  /*  477 0x9774 */ uint32_t multi_trig_buf_control;         /* Consts */
  /*  478 0x9778 */ uint32_t trig_control;                   /* Consts */
  /*  479 0x977c */ uint32_t tracer_control;                 
  /*  480 0x9780 */ uint32_t timer_tick_period;              /* Consts */
  /*  481 0x9784 */ uint32_t pulse_mux_src_mask[4];          
  /*  485 0x9794 */ uint32_t pulse_mux_dest_mask[4];         
  /*  489 0x97a4 */

} trlo_setup_map;

typedef struct trlo_pulse_map_t
{
  /*    0 0xa000 */ uint32_t pulse;                          /* Consts */
  /*    1 0xa004 */ uint32_t trig_pending;                   
  /*    2 0xa008 */ uint32_t trig_clear_pending;             
  /*    3 0xa00c */ uint32_t restart_wait;                   
  /*    4 0xa010 */ uint32_t clear_restart_wait;             
  /*    5 0xa014 */ uint32_t slew_counter;                   /* Consts */
  /*    6 0xa018 */

} trlo_pulse_map;

typedef struct trlo_trimi_conn_out_map_t
{
                    uint32_t link;                           
                    uint32_t dt;                             

} trlo_trimi_conn_out_map;

typedef struct trlo_trimi_dt_in_map_t
{
                    uint32_t enable;                         
                    uint32_t advisory;                       
                    uint32_t current;                        
                    uint32_t good;                           
                    uint32_t dbl;                            

} trlo_trimi_dt_in_map;

typedef struct trlo_trimi_map_t
{
  /*    0 0x0000 */ uint32_t status;                         
  /*    1 0x0004 */ uint32_t control;                        
  /*    2 0x0008 */ uint32_t fcatime;                        
  /*    3 0x000c */ uint32_t ctime;                          
                    uint32_t dummy_0x0010[0x0070/4];
  /*   32 0x0080 */ uint32_t link_status;                    
  /*   33 0x0084 */ uint32_t link_control;                   
  /*   34 0x0088 */ uint32_t link_sendmsg;                   
  /*   35 0x008c */ uint32_t link_speed;                     
  /*   36 0x0090 */ uint32_t link_fast_dttime;               
  /*   37 0x0094 */ uint32_t link_serial_in;                 
  /*   38 0x0098 */ uint32_t trig_in;                        
  /*   39 0x009c */ uint32_t conn_info_off;                  
  /*   40 0x00a0 */ uint32_t dt_mon_status;                  
  /*   41 0x00a4 */
                    uint32_t dummy_0x00a4[0x005c/4];
  /*      0x0100 */ trlo_trimi_conn_out_map conn_out[1];
                    uint32_t dummy_0x0108[0x00f8/4];
  /*      0x0200 */ trlo_trimi_dt_in_map dt_in[1];
  /*      0x0210 */

} trlo_trimi_map;

typedef struct trlo_register_map_t
{
  /* 0x0000 R/W */ trlo_trimi_map   trimi;
                   uint32_t         dummy_trimi[0x0dec/4];
  /* 0x1000 R   */ uint32_t         trimi_dt_mon[1024];      
                   uint32_t         dummy_trimi_dt_mon[0x2000/4];
  /* 0x4000 R   */ trlo_fixed_map   fixed;
                   uint32_t         dummy_fixed[0x0ff8/4];
  /* 0x5000 R   */ trlo_output_map  out;
                   uint32_t         dummy_out[0x0fa8/4];
  /* 0x6000 R   */ trlo_scaler_map  scaler;
                   uint32_t         dummy_scaler[0x0d48/4];
  /* 0x7000 R   */ trlo_ptnlt_map   ptnlt;
                   uint32_t         dummy_ptnlt[0x0fe0/4];
  /* 0x8000 R   */ trlo_tlatch_map  tlatch;
                   uint32_t         dummy_tlatch[0x0fc0/4];
  /* 0x9000 R/W */ trlo_setup_map   setup;
                   uint32_t         dummy_setup[0x085c/4];
  /* 0xa000   W */ trlo_pulse_map   pulse;
                   uint32_t         dummy_pulse[0x0fe8/4];
  /* 0xb000 R   */ uint32_t         multi_trigbuf[1024];     
  /* 0xc000 R   */ uint32_t         multi_latch[4][1024];    
  /*0x10000 R   */ uint32_t         tracer[1024];            
  /*0x11000 R   */ uint32_t         serial_tstamp[1024];     
  /*0x12000 R/W */ uint32_t         testramA[1024];          
  /*0x13000 R/W */ uint32_t         testramB[1024];          
  /*0x14000 R   */ uint32_t         addrtest[1024];          

} trlo_register_map;

/* MUX dest indices (function inputs): */

#define TRLO_MUX_DEST_ECL_OUT(i)                   (  0+(i)) /*  16 */
#define TRLO_MUX_DEST_ECL_IO_OUT(i)                ( 16+(i)) /*   8 */
#define TRLO_MUX_DEST_LEMO_OUT(i)                  ( 24+(i)) /*   2 */
#define TRLO_MUX_DEST_FRONT_LED(i)                 ( 26+(i)) /*   4 */
#define TRLO_MUX_DEST_LMU_IN(i)                    ( 30+(i)) /*   8 */
#define TRLO_MUX_DEST_GATE_DELAY(i)                ( 38+(i)) /*   4 */
#define TRLO_MUX_DEST_EDGE_GATE_START(i)           ( 42+(i)) /*   2 */
#define TRLO_MUX_DEST_EDGE_GATE_STOP(i)            ( 44+(i)) /*   2 */
#define TRLO_MUX_DEST_DOWNSCALE(i)                 ( 46+(i)) /*   2 */
#define TRLO_MUX_DEST_SCALER(i)                    ( 48+(i)) /*   8 */
#define TRLO_MUX_DEST_SCALER_LATCH(i)              ( 56+(i)) /*   2 */
#define TRLO_MUX_DEST_SCALER_RESET                 ( 58)     /*     */
#define TRLO_MUX_DEST_TIMER_LATCH(i)               ( 59+(i)) /*   4 */
#define TRLO_MUX_DEST_MULTI_LATCH_DISCARD_OLD(i)   ( 63+(i)) /*   4 */
#define TRLO_MUX_DEST_PTN_LATCH(i)                 ( 67+(i)) /*   2 */
#define TRLO_MUX_DEST_SLEW_LATCH                   ( 69)     /*     */
#define TRLO_MUX_DEST_SERIAL_SIGNALS_IN(i)         ( 70+(i)) /*   7 */
#define TRLO_MUX_DEST_SERIAL_TSTAMP_IN             ( 77)     /*     */
#define TRLO_MUX_DEST_SERIAL_TSTAMP_LATCH          ( 78)     /*     */
#define TRLO_MUX_DEST_TRIG_LMU_AUX(i)              ( 79+(i)) /*   4 */
#define TRLO_MUX_DEST_TRIG_LMU_TEST                ( 83)     /*     */
#define TRLO_MUX_DEST_TRIG_PENDING(i)              ( 84+(i)) /*  16 */
#define TRLO_MUX_DEST_DEADTIME_IN(i)               (100+(i)) /*   2 */
#define TRLO_MUX_DEST_BUSY_IN(i)                   (102+(i)) /*   2 */

/* MUX src indices (function outputs): */

#define TRLO_MUX_SRC_ECL_IN(i)                     (  0+(i)) /*  16 */
#define TRLO_MUX_SRC_ECL_IO_IN(i)                  ( 16+(i)) /*   8 */
#define TRLO_MUX_SRC_LEMO_IN(i)                    ( 24+(i)) /*   2 */
#define TRLO_MUX_SRC_WIRED_ZERO                    ( 26)     /*     */
#define TRLO_MUX_SRC_WIRED_ONE                     ( 27)     /*     */
#define TRLO_MUX_SRC_PRNG_POISSON(i)               ( 28+(i)) /*   1 */
#define TRLO_MUX_SRC_PULSER(i)                     ( 29+(i)) /*   7 */
#define TRLO_MUX_SRC_LMU_OUT(i)                    ( 36+(i)) /*   8 */
#define TRLO_MUX_SRC_GATE_DELAY(i)                 ( 44+(i)) /*   4 */
#define TRLO_MUX_SRC_EDGE_GATE(i)                  ( 48+(i)) /*   2 */
#define TRLO_MUX_SRC_DOWNSCALE(i)                  ( 50+(i)) /*   2 */
#define TRLO_MUX_SRC_ALL_OR(i)                     ( 52+(i)) /*   2 */
#define TRLO_MUX_SRC_COINCIDENCE(i)                ( 54+(i)) /*   1 */
#define TRLO_MUX_SRC_INPUT_COINC(i)                ( 55+(i)) /*   1 */
#define TRLO_MUX_SRC_MULTI_LATCH_ALM_FULL(i)       ( 56+(i)) /*   4 */
#define TRLO_MUX_SRC_SERIAL_TSTAMP_OUT             ( 60)     /*     */
#define TRLO_MUX_SRC_SERIAL_TSTAMP_ALM_FULL        ( 61)     /*     */
#define TRLO_MUX_SRC_SERIAL_TSTAMP_DESYNC          ( 62)     /*     */
#define TRLO_MUX_SRC_SERIAL_SIGNALS_OUT(i)         ( 63+(i)) /*   7 */
#define TRLO_MUX_SRC_HEIMTIME_OUT                  ( 70)     /*     */
#define TRLO_MUX_SRC_ACCEPT_TRIG(i)                ( 71+(i)) /*  16 */
#define TRLO_MUX_SRC_ENCODED_TRIG(i)               ( 87+(i)) /*   4 */
#define TRLO_MUX_SRC_MASTER_START                  ( 91)     /*     */
#define TRLO_MUX_SRC_DEADTIME                      ( 92)     /*     */
#define TRLO_MUX_SRC_ACCEPT_PULSE                  ( 93)     /*     */
#define TRLO_MUX_SRC_TRIG_LMU_OUT_ENABLED_OR       ( 94)     /*     */
#define TRLO_MUX_SRC_MULTI_TRIG_BUF_ALM_FULL       ( 95)     /*     */
#define TRLO_MUX_SRC_TRIMI_TDT                     ( 96)     /*     */

/* Number of MUX dest/src in arrays: */

#define TRLO_NUM_MUX_DEST_ECL_OUT                    16
#define TRLO_NUM_MUX_DEST_ECL_IO_OUT                  8
#define TRLO_NUM_MUX_DEST_LEMO_OUT                    2
#define TRLO_NUM_MUX_DEST_FRONT_LED                   4
#define TRLO_NUM_MUX_DEST_LMU_IN                      8
#define TRLO_NUM_MUX_DEST_GATE_DELAY                  4
#define TRLO_NUM_MUX_DEST_EDGE_GATE_START             2
#define TRLO_NUM_MUX_DEST_EDGE_GATE_STOP              2
#define TRLO_NUM_MUX_DEST_DOWNSCALE                   2
#define TRLO_NUM_MUX_DEST_SCALER                      8
#define TRLO_NUM_MUX_DEST_SCALER_LATCH                2
#define TRLO_NUM_MUX_DEST_TIMER_LATCH                 4
#define TRLO_NUM_MUX_DEST_MULTI_LATCH_DISCARD_OLD     4
#define TRLO_NUM_MUX_DEST_PTN_LATCH                   2
#define TRLO_NUM_MUX_DEST_SERIAL_SIGNALS_IN           7
#define TRLO_NUM_MUX_DEST_TRIG_LMU_AUX                4
#define TRLO_NUM_MUX_DEST_TRIG_PENDING               16
#define TRLO_NUM_MUX_DEST_DEADTIME_IN                 2
#define TRLO_NUM_MUX_DEST_BUSY_IN                     2

#define TRLO_NUM_MUX_DEST_CONN                       26
#define TRLO_NUM_MUX_DEST_ALL                       104

#define TRLO_NUM_MUX_SRC_ECL_IN                      16
#define TRLO_NUM_MUX_SRC_ECL_IO_IN                    8
#define TRLO_NUM_MUX_SRC_LEMO_IN                      2
#define TRLO_NUM_MUX_SRC_PRNG_POISSON                 1
#define TRLO_NUM_MUX_SRC_PULSER                       7
#define TRLO_NUM_MUX_SRC_LMU_OUT                      8
#define TRLO_NUM_MUX_SRC_GATE_DELAY                   4
#define TRLO_NUM_MUX_SRC_EDGE_GATE                    2
#define TRLO_NUM_MUX_SRC_DOWNSCALE                    2
#define TRLO_NUM_MUX_SRC_ALL_OR                       2
#define TRLO_NUM_MUX_SRC_COINCIDENCE                  1
#define TRLO_NUM_MUX_SRC_INPUT_COINC                  1
#define TRLO_NUM_MUX_SRC_MULTI_LATCH_ALM_FULL         4
#define TRLO_NUM_MUX_SRC_SERIAL_SIGNALS_OUT           7
#define TRLO_NUM_MUX_SRC_ACCEPT_TRIG                 16
#define TRLO_NUM_MUX_SRC_ENCODED_TRIG                 4

#define TRLO_NUM_MUX_SRC_CONN                        26
#define TRLO_NUM_MUX_SRC_ALL                         97

/* DIR dest indices (function inputs): */

#define TRLO_DIRECT_DEST_ECL_OUT                   (  0) /*  16 */
#define TRLO_DIRECT_DEST_ECL_IO_OUT                (  1) /*   8 */
#define TRLO_DIRECT_DEST_LEMO_OUT                  (  2) /*   2 */
#define TRLO_DIRECT_DEST_LMU_IN                    (  3) /*   8 */
#define TRLO_DIRECT_DEST_DOWNSCALE                 (  4) /*   2 */

/* DIR src indices (function outputs): */

#define TRLO_DIRECT_SRC_ECL_IN                     (  0) /*  16 */
#define TRLO_DIRECT_SRC_ECL_IO_IN                  (  1) /*   8 */
#define TRLO_DIRECT_SRC_LEMO_IN                    (  2) /*   2 */
#define TRLO_DIRECT_SRC_LMU_OUT                    (  3) /*   8 */
#define TRLO_DIRECT_SRC_DOWNSCALE                  (  4) /*   2 */
#define TRLO_DIRECT_SRC_INPUT_COINC                (  5) /*   1 */

/* Number of DIR dest/src types: */

#define TRLO_NUM_DIRECT_DEST_CONN                     3
#define TRLO_NUM_DIRECT_DEST_ALL                      5

#define TRLO_NUM_DIRECT_SRC_CONN                      3
#define TRLO_NUM_DIRECT_SRC_ALL                       6

/* General number of things. */

#define TRLO_NUM_TRIG_LMU_IN                         16
#define TRLO_NUM_TRIG_LMU_MUX_IN                      1
#define TRLO_NUM_TRIG_LMU_AUX_IN                      4
#define TRLO_NUM_TRIG_LMU_OUT                        16

/* Trigger LMU input map. */
/* (Values are in TRLO_MUX_SRC_xxx space.) */

#define TRLO_TRIG_LMU_CONN_MAP_LIST \
  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15

/* Convenience macros for filling the setup.all_or_mask[i] */

#define TRLO_ALL_OR_CLEAR(ctrl_reg) do {                           \
  size_t __i;                                                      \
  for (__i = 0; __i < sizeof(ctrl_reg)/sizeof(ctrl_reg[0]); __i++) \
    ctrl_reg[__i] = 0;                                             \
} while (0)
#define TRLO_ALL_OR_COPY(dest,src) do {                    \
  size_t __i;                                              \
  for (__i = 0; __i < sizeof(dest)/sizeof(dest[0]); __i++) \
    dest[__i] = src[__i];                                  \
} while (0)
#define TRLO_ALL_OR_SET(ctrl_reg,i) do { /* i is one of TRLO_MUX_SRC_xxx */  \
  ctrl_reg[(i) >> 5] |= ((uint32_t) 1) << ((i) & 0x1f);                      \
} while (0)
#define TRLO_ALL_OR_HAS(ctrl_reg,i) \
  (ctrl_reg[(i) >> 5] & (((uint32_t) 1) << ((i) & 0x1f)))

#define TRLO_TRACER_COINC_MUX(i,no)  ((no) << (6*(i)))
#define TRLO_TRACER_ANTI_COINC(i)    (1    << (6*(i)+5))
#define TRLO_TRACER_COINC_COUNTER(t) ((t) << 24)

#define TRLO_GET_SHIFTED(name,value) \
  (((value) & name##_MASK) >> name##_SHIFT)
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